About the team:
Project Taara focuses on delivering high-throughput and long-range connectivity via free-space optical communication (FSOC) links that use light (eye-safe lasers) propagating between two terminals to wirelessly transmit high speed data.
About the role:
Project Taara is seeking to fill a FPGA designer position. The role is focused on design, simulation, implementation, testing, and verification of digital logic for high-data-rate communications systems and precision line-of-sight tracking systems running on system-on-Chip FPGA platforms. The position seeks highly-motivated individuals that enjoy working in a small dynamic team environment, with a passion for solving challenging problems that can lead to high-impact advances in technology.
How you will make 10x impact:
- Collaborate across teams to jointly develop high-speed digital signal processing and control system algorithms supporting free-space optical communications applications.
- Implement custom RTL modules that enable high data rate communications, as well as timing-sensitive feedback-based precision line-of-sight tracking systems.
- Develop testbenches for RTL modules, perform simulation, and verify design requirements are met.
- Integrate third party IP cores into an FPGA system, create custom RTL wrappers for third party cores, and interface with IP vendors.
- Participate in board bring-up activities, system level integration tasks, troubleshooting, and field testing.
What you should have:
- Bachelor of Science in Computer Engineering or similar discipline.
- 3+ years in FPGA/ Digital Logic Design role, with experience in implementing and testing custom RTL using SystemVerilog or Verilog.
- Experience with FPGA design flow including simulation, synthesis, and static timing analysis.
- Experience with FPGA high speed interfaces.
- Excellent problem-solving and analytical skills.
- Strong communication and teamwork skills.
It would be great if you also had these:
- MS (or higher) in Computer Engineering, or a related field.
- Experience with Xilinx UltraScale/UltraScale+ FPGAs/SoCs, or equivalent.
- Experience coding in embedded C/C++ (or similar) and common scripting languages (e.g. Python).
- Experience implementing RTL blocks for high-speed communications, image processing and real-time tracking systems.
- Experience with Simulink or High Level Synthesis.
The US base salary range for this full-time position is $122,000 - $170,000 + bonuses + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your location during the hiring process.
Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, or benefits.
At X, we don't just accept difference - we celebrate it, we support it, and we thrive on it for the benefit of our employees, our products and our community. We are proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements.
If you have a disability or special need that requires accommodation, please contact us at: x-accommodation-request@x.team.