This is a fixed-term contract position for 12 months
About the Team:
Project Taara is focused on delivering high-throughput and long-range connectivity via free-space optical communication (FSOC) links that use light (eye-safe lasers) propagating between two terminals to wirelessly transmit high speed data. It can connect two points up to 10 km apart and has a few unique advantages over traditional fiber:
- Avoids challenges associated with trenching or securing permitting rights
- Costs a fraction of what it would to deploy underground cables & can be installed in a few hours
Operates in the unlicensed spectrum and, therefore, bypasses licensing fees; it is also immune to interference issues that other unlicensed alternatives face. Learn more about Project Taara
About the role:
The Taara Project is seeking a Senior Integrated Circuit engineer leading the next generation circuit design as part of the R&D team developing cutting-edge wireless optical communication systems.
The successful candidate will lead application specific integrated circuit (ASIC) development from concept to product. The position seeks highly-motivated individuals that enjoy working in a small dynamic team environment, with a passion for solving challenging problems that can lead to high-impact advances in technology.
The CMOS design will include analog mixed signal, radio frequency focused and digital design for free-space optical communication links including; analog front-end, precision D/A and A/D converters, high speed serializer/deserializer, clock and bias generation/distribution, and digital signal processing backend circuits.
What you should have:
- MS Electrical Engineering or related field
- Experience as a top-level chip owner and extensive tapeout experience including successful bring-up and testing of mixed-signal SoC.
- Demonstrated achievements in pushing the boundaries of mixed-signal circuit design
- Highly proficient in the use of standard IC design tools (Cadence Virtuoso, Innovus, etc.) and methodologies. Able to drive a design from schematic through layout and verification.
- Experience with production-grade design verification including Monte-Carlo corner simulations and EM/IR analysis of analog or digital blocks.
- Experience with CAD tool setup and debugging.
- Experience in selecting foundry technologies, working with foundries, and submitting tape-outs.
- Familiarity with IC integration with photonics and related packaging technology. Ability to evaluate the impact of different integration and packaging techniques on system performance and cost. Experience with flip-chip packaging, interposer design, and vendor engagements for prototyping.
It would be great if you also had these:
- Ph.D. Electrical Engineering or related field
- Proficiency with Python and Git.
- Experience with integrated photonics design and/or co-design of electronics and photonics.
The US base salary range for this full-time position is $122,000 - $165,000 + bonuses + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your location during the hiring process.
Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, or benefits.
At X, we don't just accept difference - we celebrate it, we support it, and we thrive on it for the benefit of our employees, our products and our community. We are proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements.
If you have a disability or special need that requires accommodation, please contact us at: x-accommodation-request@x.team.